1. Field of the Invention
The present invention relates to a semiconductor device, and in particular, to a three-dimensional semiconductor device having a through-electrode, the device being formed by stacking a plurality of semiconductor chips.
2. Description of the Related Art
In recent years, three-dimensional semiconductor devices formed by stacking a plurality of semiconductor chips has been proposed. This type of a three-dimensional semiconductor device establishes electrical continuity between semiconductor chips by through-electrodes that penetrate semiconductor substrates.
FIGS. 1 and 2 are each a sectional view of a conventional three-dimensional semiconductor device. The three-dimensional semiconductor device in FIG. 1 has three semiconductor chips 3, 4, and 5 mounted on a support substrate 1. Each of the semiconductor chips has through-electrodes 7 that penetrate the semiconductor substrate. The semiconductor chips 3, 4, and 5 are connected to one another by bumps 6 connected to the through-electrodes 7, and further connected to wiring pattern 2 on the support substrate 1. FIG. 2 is a sectional view of another example of a through-electrode 7. This through-electrode 7 comprises a through conducting layer 7a penetrating a semiconductor substrate 11, and a through-electrode insulating layer 7b. Each semiconductor chip includes connection wiring 16 for connecting the through-electrode 7, and a protective insulating layer 17. The semiconductor chips are connected to each other by a bump (not shown) in the connection wiring 16.
For making the through-electrode, holes with a diameter of several tens of micrometers are formed into the semiconductor substrate, and after a through-electrode insulating layer 7b for ensuring insulation property of side walls and the semiconductor substrate has been formed to a thickness of about several hundreds nm to several micrometers, the holes are filled in with the through conducting layer 7a. Thereafter, the through conducting layer 7a and the through-electrode insulating layer 7b are flattened so as to be flush with semiconductor substrate 11, and by a production process similar to that for an ordinary semiconductor device, a semiconductor device is produced. The layer thickness of the through-electrode insulating layer 7b surrounding the through conducting layer 7a has influences not only upon the ensuring of an insulation property, but also upon the capacity value between the substrate and the through-electrode. Therefore, the layer thickness of the through-electrode insulating layer 7b must be large enough to satisfy both of the insulation property and capacity value.
The through-electrode is caused to penetrate the semiconductor substrate with a thickness on the order of 100 μm. As a consequence, the capacity between the semiconductor substrate and the through-electrode becomes large so that high-frequency waveforms are disturbed during high-frequency data transfer, thereby raising a problem of inhibiting a high-speed data transfer. In order to reduce this capacity. It may be necessary to deposit a layer having a thickness on the order of as thick as several tens of micrometers, as an insulation layer. In the conventional art, the capacity between the semiconductor substrate 11 and the through-electrode 7 depends on the thickness of the through-electrode insulating layer and dielectric constant. Therefore, in order to reduce the capacity, the layer thickness must be increased in the conventional art.
On the other hand, in order to fill in holes for the through-electrode with a conducting layer of a diameter of several tens of micrometers, it is necessary to deposit a conducting layer having a thickness of half the hole diameter or more. As a result, the filling-in time of the conducting layer becomes long, thereby causing a problem of increasing a load in the production process. Furthermore, in case where a conducting layer of a thickness of several tens of micrometers is deposited, grains subjected to the deposition become more nonuniform as the layer thickness increases, thereby resulting in varied characteristics among the grains. Consequently, it is difficult to deposit a conducting layer with a uniform layer quality.
Regarding the through-electrode, for example, Japanese Unexamined Patent Application Publication No. 2003-017558 discloses a through-electrode of which a conducting layer has no hollow. According to its forming method for a through-electrode, after holes having a diameter of several tens of micrometers are formed into a semiconductor substrate, the holes are filled in with a coated insulating layer, and then a conducting layer is deposited on the holes formed by again etching. Also, Japanese Unexamined Patent Application Publication No. 2002-289623 discloses a semiconductor device in which a short circuit is prevented by providing a second insulating region outside a through-electrode. These patent documents, however, cannot provide a through-electrode that is small in capacity between the semiconductor substrate and the through-electrode, and that has a conducting layer with a uniform layer quality. Thus, the above-described problems have not still unsolved.
As described above, the through-electrode used for a three-dimensional semiconductor device involves two basic problems, i.e., a problem that the large capacity occurring between the semiconductor substrate and the through-electrode inhibits high-speed data transfer, and a problem that the large thickness of a conducting layer increases the deposition time of a filled-in conducting layer and makes nonuniform the layer quality of the filled-in conducting layer.